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错误 #602

基站运行一段时间后，出现物理层phy挂死

由 吕 国荣 在 将近 4 年 之前添加. 更新于 超过 3 年 之前.

状态:
已解决
优先级:
高
指派给:
吕 国荣
目标版本:
Rel_2.1.8
开始日期:
2021-07-22
计划完成日期:
% 完成:

0%

预期时间:
问题归属:
FPGA
CPU类型:

相关的问题

关联到 上行大带宽 - 错误 #580: 物理层出现FH 过来的slot号跳变导致物理层挂死已解决2021-06-28

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#1

由 吕 国荣 更新于 将近 4 年 之前

抓取log 确认挂死时 前传过来的数据填写的slot号和tti的不一致导致：


[07-22 10:57:10.403][ERROR][DRV] FH_Rx, header[194,2,0] SlotIdx[3884] TTI_time[194,6,1] TTIslotIdx[3893] ///驱动报错，slot不一致
[07-22 10:57:10.403][DEBUG][FH-RX]phy_fpga_ul_iq_setup, SlotAdvIdx[3884] OneSymDataSize[13104] FirstHalfSlot[1] SymbMask[0x  7f] g_Stub_pusch_Data_switch[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_set_ul_iq_pointers, CellIdx[0] slotIdx[3884] SymbMask[0x7f] Unlock[1] LastDmrsSymbolMask[0] LastSymbol[6]
[07-22 10:57:10.403][DEBUG][FH-RX]phy_fpga_ul_iq_setup, SlotAdvIdx[3884] OneSymDataSize[13104] FirstHalfSlot[0] SymbMask[0x3f80] g_Stub_pusch_Data_switch[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_set_ul_iq_pointers, CellIdx[0] slotIdx[3884] SymbMask[0x3f80] Unlock[1] LastDmrsSymbolMask[8192] LastSymbol[13]
[07-22 10:57:10.403][DEBUG]Func:phy_bbupool_update_multi_cell_status, SfIdx[3894], CellNum[1]
[07-22 10:57:10.403][DEBUG][PHY-->DU] MSG_TYPE_PHY_SLOT_IND: CellNum[1], SlotIdx[3894], TTI[194,14].
[07-22 10:57:10.403][DEBUG]---- 0_DL_L1_CONFIG [phy_gnb_bbupool_task_dl_config] CellIdx[0] Subframe[3894] SlotAdvIdx[3896] Ctx[0] timediff[479.357]us
[07-22 10:57:10.403][DEBUG]POP_API_FROM_QUEUE:[push:51, pop:51], apiArraySfn[3896] numInQueue[1]
[07-22 10:57:10.403][DEBUG]PUSH_API_TO_QUEUE:[push:52, pop:51], apiArraySfn[3897] numInQueue[2]
[07-22 10:57:10.403][DEBUG]Bypass Prach: nSfIdx[3894] nFrameIdx[194] SubfrmIdx[7] SlotNum[14] SubSlotIdx[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_bbupool_gen_task_ul_prach, CellIdx[0], SlotIdx[3894], bypassflag[1], Caller[14]
[07-22 10:57:10.403][DEBUG]prach_debug isClear[0] iCtx[2] SlotIdx[3894] taskType[3] TaskSched[65535]
[07-22 10:57:10.403][DEBUG]phy_gnb_bbupool_ul_set_list: prach_debug isClear[0] iCtx[2] SlotIdx[3894] taskType[3] nTaskSched[3895]
[07-22 10:57:10.403][DEBUG]phy_fpga_dl_set_remap_buffer, SlotIdx[3894] SlotAdvIdx[3896] bufIdx[0] oneSymDataSize[13104], PktLen[26240]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_rs, CellIdx[0] Subframe[3894] SlotAdvIdx[3896] iCtx[0]
[07-22 10:57:10.403][INFO ]phy_dl_pdsch_rs_task, nCellIdx[0], nSlotAdvIdx[3896], nCtxNum[0], nGroup[0], nSlotInFrame[16]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_bbupool_task_dl_control_channels, CellIdx[0] Subframe[3894] SlotAdvIdx[3896] CtxNum[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_tb, CellIdx[0] Subframe[3894] SlotAdvIdx[3896] CtxNum[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_bbupool_task_ul_config, CellId[0] Slot[3894] SlotAdvIdx[3894] Ctx[2] nListRunning[0]
[07-22 10:57:10.403][DEBUG][phy_dl_x86_encode_task_func] CellIdx[0] SlotIdx[3894] SlotAdvIdx[3896] iCtx[0] Group[0] timediff[477.928]us
[07-22 10:57:10.403][DEBUG]phy_ul_pusch_symbol_buffer_pre_alloc_func, RX[194, 14], PUSCHGrantNum[0], CompressPUSCHProcess[0]
[07-22 10:57:10.403][DEBUG][phy_dl_x86_encode_task_func]: CellIdx[0] SlotIdx[3894] SlotAdvIdx[3896] Ctx[0] FEC_DealTime[1.173]us
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_scrambler, CellIdx[0] Subframe[3894] SlotAdvIdx[3896] CtxNum[0]
[07-22 10:57:10.403][INFO ]phy_dl_pdsch_scrambler_task, nCellIdx[0] nSlotAdvIdx[3896] nCtxNum[0] nGroup[0]
[07-22 10:57:10.403][INFO ][Symbol LEVEL]--phy_dl_pdsch_modulation_task, Group[0], SlotAdvIdx[3896]
[07-22 10:57:10.403][INFO ][Symbol LEVEL]--phy_dl_pdsch_precoder_task, nCtxNum[0],nSlotAdvIdx[3896], nGroup[0]
[07-22 10:57:10.403][INFO ]Enter to pdsch_remapper_task, nCtxNum[0], nFrameNumber[194], nSlotNum[16], nSlotAdvIdx[3896], nGroup[0]!!
[07-22 10:57:10.403][INFO ]dl_pdsch_symbol_proc, CtxNum[0], Subframe[3894] SlotAdvIdx[3896],modulation[0.424000]us, precoder[0.359000]us, RE_MAP[0.486000]us,Total[1.269000]us
[07-22 10:57:10.403][INFO ]Func:phy_gnb_bbupool_task_dl_post, CellIdx[0] Subframe[3894] SlotAdvIdx[3896]
[07-22 10:57:10.403][INFO ]Func:Post_task_dl_reset_buf, CellIdx[0] Subframe[3894] SlotAdvIdx[3896] Ctx[0], bufIdx[4], oneSymDataSize[13104] TxPortNum[2]

[07-22 10:57:10.403][DEBUG][FH-RX]phy_fpga_ul_iq_setup, SlotAdvIdx[3893] OneSymDataSize[13104] FirstHalfSlot[1] SymbMask[0x  7f] g_Stub_pusch_Data_switch[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_set_ul_iq_pointers, CellIdx[0] slotIdx[3893] SymbMask[0x7f] Unlock[1] LastDmrsSymbolMask[0] LastSymbol[6]
[07-22 10:57:10.403][DEBUG][FH-RX]phy_fpga_ul_iq_setup, SlotAdvIdx[3893] OneSymDataSize[13104] FirstHalfSlot[0] SymbMask[0x3f80] g_Stub_pusch_Data_switch[0]
[07-22 10:57:10.403][DEBUG]Func:phy_gnb_set_ul_iq_pointers, CellIdx[0] slotIdx[3893] SymbMask[0x3f80] Unlock[1] LastDmrsSymbolMask[8192] LastSymbol[13]
[07-22 10:57:10.404][DEBUG]Func:phy_bbupool_update_multi_cell_status, SfIdx[3895], CellNum[1]
[07-22 10:57:10.404][DEBUG][PHY-->DU] MSG_TYPE_PHY_SLOT_IND: CellNum[1], SlotIdx[3895], TTI[194,15].
[07-22 10:57:10.404][DEBUG]---- 0_DL_L1_CONFIG [phy_gnb_bbupool_task_dl_config] CellIdx[0] Subframe[3895] SlotAdvIdx[3897] Ctx[1] timediff[480.196]us
[07-22 10:57:10.404][DEBUG]POP_API_FROM_QUEUE:[push:52, pop:52], apiArraySfn[3897] numInQueue[1]
[07-22 10:57:10.404][DEBUG]Bypass Prach: nSfIdx[3895] nFrameIdx[194] SubfrmIdx[7] SlotNum[15] SubSlotIdx[1]
[07-22 10:57:10.404][DEBUG]PUSH_API_TO_QUEUE:[push:53, pop:52], apiArraySfn[3898] numInQueue[2]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_gen_task_ul_prach, CellIdx[0], SlotIdx[3895], bypassflag[1], Caller[14]
[07-22 10:57:10.404][DEBUG]prach_debug isClear[0] iCtx[3] SlotIdx[3895] taskType[3] TaskSched[65535]
[07-22 10:57:10.404][DEBUG]phy_gnb_bbupool_ul_set_list: prach_debug isClear[0] iCtx[3] SlotIdx[3895] taskType[3] nTaskSched[3896]
[07-22 10:57:10.404][DEBUG]phy_fpga_dl_set_remap_buffer, SlotIdx[3895] SlotAdvIdx[3897] bufIdx[1] oneSymDataSize[13104], PktLen[26240]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_ul_config, CellId[0] Slot[3895] SlotAdvIdx[3895] Ctx[3] nListRunning[0]
[07-22 10:57:10.404][DEBUG]phy_ul_pusch_symbol_buffer_pre_alloc_func, RX[194, 15], PUSCHGrantNum[0], CompressPUSCHProcess[0]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_rs, CellIdx[0] Subframe[3895] SlotAdvIdx[3897] iCtx[1]
[07-22 10:57:10.404][INFO ]phy_dl_pdsch_rs_task, nCellIdx[0], nSlotAdvIdx[3897], nCtxNum[1], nGroup[0], nSlotInFrame[17]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_control_channels, CellIdx[0] Subframe[3895] SlotAdvIdx[3897] CtxNum[1]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_tb, CellIdx[0] Subframe[3895] SlotAdvIdx[3897] CtxNum[1]
[07-22 10:57:10.404][DEBUG][phy_dl_x86_encode_task_func] CellIdx[0] SlotIdx[3895] SlotAdvIdx[3897] iCtx[1] Group[0] timediff[480.926]us
[07-22 10:57:10.404][DEBUG][phy_dl_x86_encode_task_func]: CellIdx[0] SlotIdx[3895] SlotAdvIdx[3897] Ctx[1] FEC_DealTime[1.189]us
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_scrambler, CellIdx[0] Subframe[3895] SlotAdvIdx[3897] CtxNum[1]
[07-22 10:57:10.404][INFO ]phy_dl_pdsch_scrambler_task, nCellIdx[0] nSlotAdvIdx[3897] nCtxNum[1] nGroup[0]
[07-22 10:57:10.404][INFO ][Symbol LEVEL]--phy_dl_pdsch_modulation_task, Group[0], SlotAdvIdx[3897]
[07-22 10:57:10.404][INFO ][Symbol LEVEL]--phy_dl_pdsch_precoder_task, nCtxNum[1],nSlotAdvIdx[3897], nGroup[0]
[07-22 10:57:10.404][INFO ]Enter to pdsch_remapper_task, nCtxNum[1], nFrameNumber[194], nSlotNum[17], nSlotAdvIdx[3897], nGroup[0]!!
[07-22 10:57:10.404][INFO ]dl_pdsch_symbol_proc, CtxNum[1], Subframe[3895] SlotAdvIdx[3897],modulation[0.407000]us, precoder[0.364000]us, RE_MAP[0.436000]us,Total[1.207000]us
[07-22 10:57:10.404][INFO ]Func:phy_gnb_bbupool_task_dl_post, CellIdx[0] Subframe[3895] SlotAdvIdx[3897]
[07-22 10:57:10.404][INFO ]Func:Post_task_dl_reset_buf, CellIdx[0] Subframe[3895] SlotAdvIdx[3897] Ctx[1], bufIdx[5], oneSymDataSize[13104] TxPortNum[2]

[07-22 10:57:10.404][DEBUG][FH-RX]phy_fpga_ul_iq_setup, SlotAdvIdx[3894] OneSymDataSize[13104] FirstHalfSlot[1] SymbMask[0x  7f] g_Stub_pusch_Data_switch[0]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_set_ul_iq_pointers, CellIdx[0] slotIdx[3894] SymbMask[0x7f] Unlock[1] LastDmrsSymbolMask[0] LastSymbol[6]
[07-22 10:57:10.404][DEBUG][FH-RX]phy_fpga_ul_iq_setup, SlotAdvIdx[3894] OneSymDataSize[13104] FirstHalfSlot[0] SymbMask[0x3f80] g_Stub_pusch_Data_switch[0]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_set_ul_iq_pointers, CellIdx[0] slotIdx[3894] SymbMask[0x3f80] Unlock[1] LastDmrsSymbolMask[8192] LastSymbol[13]
[07-22 10:57:10.404][DEBUG]Func:phy_bbupool_update_multi_cell_status, SfIdx[3896], CellNum[1]
[07-22 10:57:10.404][DEBUG][PHY-->DU] MSG_TYPE_PHY_SLOT_IND: CellNum[1], SlotIdx[3896], TTI[194,16].
[07-22 10:57:10.404][DEBUG]---- 0_DL_L1_CONFIG [phy_gnb_bbupool_task_dl_config] CellIdx[0] Subframe[3896] SlotAdvIdx[3898] Ctx[2] timediff[479.674]us
[07-22 10:57:10.404][DEBUG]POP_API_FROM_QUEUE:[push:53, pop:53], apiArraySfn[3898] numInQueue[1]
[07-22 10:57:10.404][DEBUG]PUSH_API_TO_QUEUE:[push:54, pop:53], apiArraySfn[3899] numInQueue[2]
[07-22 10:57:10.404][DEBUG]Bypass Prach: nSfIdx[3896] nFrameIdx[194] SubfrmIdx[8] SlotNum[16] SubSlotIdx[0]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_gen_task_ul_prach, CellIdx[0], SlotIdx[3896], bypassflag[1], Caller[14]
[07-22 10:57:10.404][DEBUG]prach_debug isClear[0] iCtx[0] SlotIdx[3896] taskType[3] TaskSched[3893]
[07-22 10:57:10.404][ERROR]phy_gnb_bbupool_ul_set_list: Already Scheduled gMySfn[2113340] CellIdx[0] SlotIdx[3896] taskType[3] prevSched[TaskSched(3893)-1]
[07-22 10:57:10.404][DEBUG]phy_fpga_dl_set_remap_buffer, SlotIdx[3896] SlotAdvIdx[3898] bufIdx[2] oneSymDataSize[13104], PktLen[26240]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_ul_config, CellId[0] Slot[3896] SlotAdvIdx[3896] Ctx[0] nListRunning[1]
[07-22 10:57:10.404][ERROR]Previous UL list is not completed CellIdx[0] Subframe[3896] SfIdx[3896] iCtx[0] gMySfn[2113340]
[07-22 10:57:10.404][FATAL]phy_bbupool_reset_cell_state, Reset pBbu->nCurrentSfIdx--->>>[-1]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_rs, CellIdx[0] Subframe[3896] SlotAdvIdx[3898] iCtx[2]
[07-22 10:57:10.404][INFO ]phy_dl_pdsch_rs_task, nCellIdx[0], nSlotAdvIdx[3898], nCtxNum[2], nGroup[0], nSlotInFrame[18]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_pdsch_tb, CellIdx[0] Subframe[3896] SlotAdvIdx[3898] CtxNum[2]
[07-22 10:57:10.404][DEBUG]Func:phy_gnb_bbupool_task_dl_control_channels, CellIdx[0] Subframe[3896] SlotAdvIdx[3898] CtxNum[2]
[07-22 10:57:10.404][DEBUG][phy_dl_x86_encode_task_func] CellIdx[0] SlotIdx[3896] SlotAdvIdx[3898] iCtx[2] Group[0] timediff[479.576]us
[07-22 10:57:10.404][DEBUG][phy_dl_x86_encode_task_func]: CellIdx[0] SlotIdx[3896] SlotAdvIdx[3898] Ctx[2] FEC_DealTime[1.151]us
[07-22 10:57:10.405][ERROR]An ambiguous subframe index 3897 is received at CurrentSfIdx[-1], caller[1], TimeDiff[3897]
[07-22 10:57:10.405][FATAL]gnb_fh_thread, TimeLastUs[626] TimeDiff[1] Realslot[0] TimeOut_Cnt[1]
[07-22 10:57:10.405][ERROR]Update SfIdx by CallerFlag[0]: CurrentSfIdx[-1] --> SfIdx[0]

#2

由 吕 国荣 更新于 将近 4 年 之前

  • 关联到 错误 #580: 物理层出现FH 过来的slot号跳变导致物理层挂死 已添加
#3

由 吕 国荣 更新于 超过 3 年 之前

  • 状态 从 新建 变更为 已解决

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